Jet-printed and dielectrophoretically aligned nanowires for large area electronics

Citation

Raychaudhuri, S.; Wong, W. S.; Sambandan, S.; Lujan, R. A.; Street, R. A. Jet-printed and dielectrophoretically aligned nanowires for large area electronics. Electronic Materials Conference; 2010 June 23-25; Notre Dame, IN.

Abstract

The ability to integrate Si nanowires (Si NW) on plastic substrates may greatly enhance the performance of low cost flexible electronics. Si nanowire properties can be controlled during growth and leveraged to produce nanowires which are tailored for specific applications. Being able to then harvest these wires and distribute them across a large area substrate in a controlled manner opens up many opportunities for high performance large area and flexible electronics. In this talk we report on Si NW field effect transistors (FETs) fabricated using ink-jet printing as a means to distribute Si NW mats at specified locations across a donor substrate. The Si nanowires were first grown on a Si substrate. The growths were carried out in a chemical vapor deposition system using the vapor-liquid-solid growth process with either Au nanoparticles or an Au thin film to seed the growths. The nanowires were removed from the growth substrate and suspended in water. The nanowire suspension was then loaded into a commercially available ink jet printer and printed onto device substrates. As a means to control the position and orientation of the printed nanowires, an AC electric field was applied across predefined electrodes on the device substrate. This approach to assembling printed nanowires resulted in well-aligned nanowires along the channel region of the FET having channel lengths between 3 to 13 microns and channel widths of 2 to 8 microns. The printed nanowires were then processed into top-gate and bottom-gate transistors using conventional lithographic techniques. The p-type devices showed threshold voltages of around -5 volts, hole mobilities greater than 10 cm^2/V/s and on-off ratios greater than 10^5. We will also discuss several aspects of printing necessary for good device yields and the effect of varying AC electric fields on the printing and assembly process. Finally we will discuss how to make use of these techniques in a scalable way and demonstrate how they can be used to fabricate a TFT backplane that is sufficient to drive reflective display media.


Read more from SRI